1. Technical Field
The present invention relates generally to integrated circuits which include phase-locked loop circuitry and clock distribution systems.
2. Description of the Background Art
A phase-locked loop (PLL) is an electronic circuit with an oscillator. A PLL adjusts the frequency of a feedback signal from the output of the oscillator to match in phase the frequency of an input reference clock signal. Phase-locked loops (PLLs) are an essential building block of many integrated circuits, providing periodic signals for data recovery, data transfer, and other clocking functions.
A PLL may be used to generate a signal, modulate or demodulate a signal, reconstitute a signal with less noise, or multiply or divide a frequency. For example, a PLL may supply a clock signal to one or more counters or dividers that divide a signal from the oscillator to a lower frequency clock signal for distribution around an integrated circuit. In another example, a PLL may be used to stabilize the frequency of a communications channel.